Exploiting Bit–slice Inactivities for Reducing Energy Requirements of Superscalar Processors

Exploiting Bit–slice Inactivities for Reducing Energy Requirements of Superscalar Processors
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Exploiting Bit–slice Inactivities for Reducing Energy Requirements of Superscalar Processors- Simulating SPEC 95 execution benchmarks on detailed register–level, cycle-by-cycle superscalar CPU shows how to use lack of data stream entropy to cut power use.
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